#Synopsys vcs verification
The VCS® Verification Library provides the broadest portfolio of design-proven, standards-based verification IP (VIP) helping designers save testbench development time and reach functional coverage goals faster. Current customers of DesignWare verification IP can gain access to the new functionality at no additional charge by downloading the latest version from the Synopsys web site. The VCS Verification Library is available now. "Synopsys is leading the way in solving these challenges with a product that simplifies testbench creation, provides better coverage and delivers much higher verification performance."
"As the standard interfaces on SoC designs continue to increase in number and complexity, designers are faced with tremendous verification challenges," said Guri Stark, vice president of Marketing, Synopsys' Solutions Group. "VCS NTB is an integral part of our verification process." "Using Synopsys' verification IP helped accelerate the development of our constrained-random testbench environment which enabled us to obtain high functional coverage and identify corner case design bugs," said Randy Mullin, director of verification at Tundra Semiconductor Corporation. By natively integrating these technologies, designers can achieve a shorter verification cycle with up to five times faster runtime performance. The VCS Verification Library is supported by VCS' Native Testbench (NTB) technology which compiles VCS Verification Library IP, testbench, assertions and design-under-test together into a single high-performance executable. RVM uses coverage-driven and constrained-random techniques with support for the industry-standard SystemVerilog and OpenVera® hardware verification languages. The VCS Verification Library provides extensive support for the Synopsys Reference Verification Methodology (RVM), which was developed by verification experts to help engineers adopt industry-best practices for the development of interoperable and reusable verification environments. The verification IP includes traffic generators, and monitors to provide functional coverage of bus protocols and identify protocol violations.
#Synopsys vcs serial
The VCS Verification Library includes verification IP for the industry's most popular bus protocols, including AMBA™ 3 AXI™, AMBA 2.0, PCI Express®, USB, Serial ATA and 10G Ethernet, as well as more than 10,000 memory models. The VCS Verification Library builds on the industry-proven DesignWare® Verification IP, allowing designers to achieve up to five times performance improvement when used with Synopsys' VCS comprehensive RTL verification solution, or Pioneer-NTB SystemVerilog testbench automation tool. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced the release and general availability of the VCS®Verification Library, a broad portfolio of design-proven, standards-based verification IP (VIP).
0 kommentar(er)
